1. Field of the Invention
The present invention relates to a driving method for an active liquid crystal display device.
2. Description of the Related Art
In an active matrix liquid crystal display device, when a voltage with a predetermined waveform is applied on a common electrode facing a pixel electrode, the pixel electrodes in a display area are scanned from top to bottom, and a writing voltage with a predetermined waveform is applied on the source electrode, whereby a pixel voltage is generated between the pixel electrode and the common electrode for display.
To economize power consumption, sometimes, only a part of the display area is used.
In such a condition, the pixel voltage is only generated in between the pixel electrode and the common electrode of the displayed area. For example, one of the top, middle and bottom areas is displayed, or the top and bottom areas are displayed. The rest of the areas are OFF.
The method for driving an active matrix liquid crystal display device for displaying a part of the display area has been disclosed in many patents, such as JP 2001-356746.
Meanwhile, for an image formed by frame inversion driving or line inversion driving in a conventional active matrix liquid crystal display device, the display depth fades from top to bottom of the display area, which causes a non-uniform depth problem.
FIG. 6 depicts a display condition of a black image in the whole display area and voltage waveform of each electrode in an active matrix liquid crystal display device driven by a conventional method, in which a normally white display device is driven by frame inversion with inverting the common voltage waveform to display normally entirely areas.
As shown in FIG. 6, in each frame period, a voltage with an alternative waveform (low level when positive and high level when negative) is applied on a common electrode facing a pixel electrode.
For a black display area, a positive writing voltage, which is at a high level during the positive frame period of the common electrode, is provided and a negative writing voltage, which is at a low level during the negative frame period of the common electrode is provided to source electrodes for supplying writing signals to pixel electrodes. For a white display area, a positive writing voltage, which is at a low level during the positive frame period of the common electrode, is provided and a negative writing voltage, which is at a high level during the negative frame period of the common electrode, is provided.
The pixel electrodes are arranged as a matrix in the display area and scanned from the top to bottom of the display area.
For each pixel electrode, since the pixel electrodes are scanned in a period and the writing voltage (pixel voltage) is applied on the pixel electrodes, the writing voltage is held during a frame period.
The timing for applying and holding the pixel voltage on the pixel electrodes on the top, middle and bottom display area is different, wherein the timing begins earlier for pixel electrodes near the top display area and later for pixel electrodes near the bottom display area.
The pixel voltage applying on the pixel electrode for circuit characteristics is influenced by the polarity of the common electrode and the writing voltage provided to the source electrode to slightly increase or decrease.
For example, when the polarity of the common electrode changes from negative to positive, the holding voltage slightly increases after the inversion point. On the contrary, when the polarity of the common electrode changes from positive to negative, the holding voltage slightly decreases after the inversion point. The increase or decrease of the pixel voltage caused by polarity inversion of the common electrode is shown in FIG. 6.
When the positive writing voltage is provided from the source electrode to the pixel electrode, the pixel voltage in one of the top display area, the middle display area and the bottom display area is also reduced during the voltage holding period by the change of the common voltage from positive to negative.
However, the timing of applying and holding the pixel voltage in each pixel electrode has deviation corresponding to the scan timing of the pixel electrode.
The pixel voltage reduction caused by the inversion occurs near the end of the voltage holding period for the pixel electrode in the top display area, near the middle part of the voltage holding period for the pixel electrode in the middle display area, and near the beginning of the voltage holding period for the pixel electrode in the bottom display area.
To verify the display depth of each display area, the display depth is proportional to the integral value of the pixel voltage on the pixel electrode within the holding period. Thus, the display depth is proportional to the area of the hatched portion of the pixel voltage waveform in the top display area, middle display area and bottom display area of FIG. 6.
Since the timing of the pixel voltage reduction caused by the inversion of the common voltage is different for the top area, middle area and bottom area, the hatched portion of the waveform in the top display area is the largest, and the hatched portion of the waveform in the bottom display area is the smallest.
Therefore, the top display area has the greatest display depth, the bottom display area has the least display depth, and the middle display area has the intermediate display depth.
Since the display depth difference occurs when the pixel electrodes are scanned, as shown in FIG. 6, the display depths of the display areas fade from top to bottom, which is at the depth gradient problem in a conventional active matrix liquid crystal display device.
In addition to entirely displayed areas, the depth gradient problem in a conventional active matrix liquid crystal display device is also seen in the partially displayed areas.
FIG. 7 depicts a display condition of a black image in the partial display mode and voltage waveforms of each electrode in an active matrix liquid crystal display device driven by a conventional method, in which a normally white display device is driven by frame inversion with inverting the common voltage waveform to partially display.
The waveform of the common voltage is the same as the common voltage shown in FIG. 6. Voltage with an alternative waveform (low level when positive and high level when negative) is applied on a common electrode during the frame period.
A positive writing voltage, which is at a high level during the positive frame period of the common electrode, and a negative writing voltage, which is at low during the negative frame period of the common electrode, are provided for the source electrode during the scan timing of the partially displayed area. In FIG. 7, the solid line represents the source voltage for the display of the middle display area, and the broken line represents the source voltage for the display of the top or the bottom display area.
When the top display area is displayed, the broken line marked with “Top” represents the writing voltage for the source electrode. The writing voltage of each pixel electrode on the top display area in FIG. 7 is held during a frame period.
In the partially displayed mode, when no inversion of the common voltage occurs, the positive writing voltage for the source electrode changes from a high level to a low level during the voltage holding period of the pixel electrode.
The held pixel voltage of the pixel electrode of the top display area slightly decreases corresponding to the variation of the writing voltages, as shown in FIG. 7.
When the middle display area is displayed, the writing voltage of each pixel electrode on the top display area in FIG. 7 is held during a frame period.
When the common voltage is positive, the positive writing voltage for the source electrode changes from a high level to a low level during the voltage holding period of the pixel electrode.
The held pixel voltage of the pixel electrode in the middle display area is influenced by the change of the writing voltage and the inversion of the common voltage, as shown in FIG. 7, and has a two-step reduction.
When the bottom display area is displayed, the broken line marked with “Bottom” represents the writing voltage for the source electrode. The writing voltage of each pixel electrode on the bottom display area in FIG. 7 is held during a frame period.
The common voltage inverts from positive to negative during the pixel voltage holding period. When the common voltage is inverted, the writing voltage for the source electrode becomes high. This writing voltage is applied to a black display during the period of the positive common voltage and is applied to a white display when the common voltage changes to negative. Thus, the writing voltage changes when the polarity of the common voltage inverts.
The held pixel voltage in the bottom display area, as shown in FIG. 7, has a two-step reduction when the polarity of the common voltage is inverted.
The display depth is proportional to the integral value of the pixel voltage applied on the pixel electrode in the holding period. The hatched portion of the waveform in the top display area has the largest area, and the hatched portion of the waveform in the bottom area has the smallest area.
Even in a partially displayed condition, the top display area has the greatest display depth, the bottom display area has the least display depth, and the middle display area has the intermediate display depth. In the partially displayed condition, the depth gradient problem still exists.
Although one of the top, middle and bottom display areas is displayed in the partially displayed mode, the top and bottom display areas can also be displayed simultaneously, wherein the rest of the areas would be OFF, i.e. a partially split display mode.
Even for the partially split display mode, the depth gradient problem still exists.
FIG. 8 depicts a display condition of a black image in the partially split display mode and voltage waveform of each electrode in an active matrix liquid crystal display device driven by a conventional method, in which a normally white display device is driven by frame inversion inverting the common voltage waveform to partially display.
FIG. 8 shows a partially split display mode, wherein the top and bottom display areas are displayed, and the middle display area is OFF.
The common voltage has the same waveform as the common voltage in FIGS. 6 and 7. Voltage with an alternative waveform (low level when positive and high level when negative) is applied on a common electrode during the frame period.
A positive writing voltage, which is at a high level during the positive frame period of the common electrode, and a negative writing voltage, which is at a low level during the negative frame period of the common electrode, are provided for the source electrode during the scan timing of the partially split display area (top and bottom display areas).
The writing voltage (pixel voltage) of each pixel electrode on the top display area in FIG. 8 is held during a frame period, and the writing voltage (pixel voltage) of each pixel electrode on the bottom display area in FIG. 8 is held during a frame period.
Even in the partially split display condition, when no inversion of the common voltage occurs, the held pixel voltage rises or reduces due to the change of the writing voltage.
Meanwhile, for the top display area, the positive writing voltage provided for the source electrode changes from a high level to a low level and changes from a low level to a high level during the positive frame period of the common voltage and holding period of the pixel voltage of the pixel electrode in the top display area.
The held pixel voltage of the pixel electrode in the top display area, as shown in FIG. 8, slightly decreases corresponding to the initial variety of the positive writing voltage, and slightly increases corresponding to the variety of the positive writing voltage thereafter.
When the common voltage changes from positive to negative, the pixel voltage slightly reduces, and when a frame period of the pixel voltage of the pixel electrode in the top display area ends, it enters the frame period of a negative polarity of the common electrode.
Meanwhile, for the bottom display area in the partially split display mode, in the scan period of the pixel electrode, when the pixel voltage is held, the common voltage changes from positive to negative, and the writing voltage for the source electrode changes from a high level to a low level.
The held pixel voltage of the pixel electrode in the bottom area is influenced by the inversion of the common voltage and the writing voltage changes, as shown in FIG. 8, and has two-step reduction.
During the negative frame period of the common voltage, when the negative writing voltage changes from a low level to a high level, the pixel voltage slightly rises with respect to the change, and when a frame period of the pixel voltage of the pixel electrode in the bottom display area ends, it enters the frame period of a negative polarity of the common electrode.
Since the display depth of each display area is proportional to the integral value of the pixel voltage applied on the pixel electrode with respect to the holding period, the hatched area of the waveform of the pixel electrode in the top display area is larger than the hatched area of the waveform of the pixel electrode in the bottom display area.
Even in the partially split display condition, the depth gradient still exists.
In addition to the described conditions, when a DC voltage is provided to the common electrode to drive the display device, the depth gradient problem still exists.
FIG. 9 depicts a display condition of a black image in the partially display mode and voltage waveform of each electrode in an active matrix liquid crystal display device driven by a conventional method, in which a normally white display device is driven by frame/column inversion with the DC common voltage for partial display.
In FIG. 9, the common voltage, as DC voltage, is constant.
During the scan timing of the display areas in the partial display, for the black display areas, a positive writing voltage (high level with respect to the intermediate value of the source voltage amplitude) and a negative writing voltage (low level with respect to the intermediate value of the source voltage amplitude) are provided to the positive output source bus and the negative output source bus, respectively, as the black writing voltage.
FIG. 9 shows the black display in the display areas in a partial display mode. In the white display condition, during the scan timing of the display areas in the partial display mode, the high level voltage, which is almost the same as the predetermined voltage and the low level voltage, which is almost the same as the predetermined voltage, are provided to the positive output source bus and the negative output source bus respectively as the white writing voltage.
In FIG. 9, the solid line represents the source voltage in the middle display area for partial display. The broken line represents the source voltage in the top and bottom display areas for partial display.
When the top display area is displayed for partial display, the writing voltage marked by the broken line “Top” is provided to the source electrode. The writing voltage (pixel voltage) shown in FIG. 9 is held at the pixel electrode in the top display area during the frame period.
Even if the common voltage is a DC voltage, because the writing voltage from the source electrode varies, the pixel voltage held at the pixel electrode increases or decreases.
For example, when the top display area is displayed for partial display and the pixel voltage is held during the positive frame period, the writing voltage is applied to the source electrode changes from a black writing positive voltage of high level to a white writing positive voltage.
The pixel voltage held on the pixel electrode in the top display area slightly reduces as the writing voltage changes, as shown in FIG. 9.
When the middle display area is displayed for partial display, the writing voltage marked by the solid line is provided to the source electrode. The writing voltage (pixel voltage) shown in FIG. 9 is held at the pixel electrode in the middle display area during the frame period.
At this time, when the pixel voltage is held, the writing voltage for the source electrode changes from a high level of a black writing positive voltage to a white writing positive voltage, and changes from a positive writing voltage to a negative writing voltage.
The pixel voltage in the middle display area, influenced by the two-step writing voltage changes, as shown in FIG. 9, also has a two-step reduction.
When the bottom display area is displayed for partial display, the writing voltage marked by the broken line “Bottom” is provided to the source electrode. The writing voltage (pixel voltage) shown in FIG. 9 is held at the pixel electrode in the bottom display area during the frame period.
At this time, when the pixel voltage changes from the positive frame period to the negative frame period, the writing voltage from the source electrode becomes a high level as a writing voltage for a positive black display. When the pixel voltage enters the negative frame period, the writing voltage from the source electrode becomes a low level as a writing voltage for a negative black display. Thus, when the polarity of writing voltage changes, the level of the writing voltage changes.
The pixel voltage held on the pixel electrode, as shown in FIG. 9, has a two-step reduction when it changes from the positive frame period to the negative frame period and the writing voltage changes.
The amplitude of the source voltage is proportional to the integral value of the pixel voltage of the pixel electrode in the holding period. The hatched portion of the waveform in the top display area is the largest, and the hatched portion of the waveform in the bottom display area is the smallest.
Even when DC voltage is provided as the common voltage, the depth gradient problem still exists.